Takagi Laboratory
Doctor-Course Graduates and Their Dissertation Titles
Fiscal Year 2007
Osamu Watanabe
Application Techniques for Low Power and Highly Integrated Analog Circuits
in Wireless Communications
Fiscal Year 2006
Masaru Kokubo
Integration Techniques of Phase Locked Loops for SoCs in Fine Design-Rule Process
Fiscal Year 2004
Nicodimus Retdian Agung
Substrate Noise Reduction Techniques in Mixed-Signal Integrated Circuits
Fiscal Year 1999
Moonjae Jeong
Fully Balanced Circuit Designs Having Zero Common-Mode Gain
Fiscal Year 1997
Kazuyuki Wada
Master-Course Graduates and Their Thesis Titles
Fiscal Year 2012
Kaituo Zhang
Reduction in Power Consumption of Current-Mode Multipath Circuits
by Current-Reuse Technique (in Japanese)
Fiscal Year 2011
Hiroshi Suzuki
Basic Study on Effective Layouts of Multipath Circuits
for Reduction in Substrate Noise (in Japanese)
Daisuke Horii
Single Operational Amplifiter Higher-Order Switched Capcitor Filter
with Compensation for Parasitic Capacitor Effects (in Japanese)
Zhishan Xu
Power Reduction in Leapfrog Filters with Transmission Zeros
by Reducing the number of Active Elements
Fiscal Year 2010
Seiji Sugiura
Leapforg High-Pass Filter using Switched Capacitor Differentiators (in Japanese)
Nawatt Silawan
Low-Phase-Error Superharmonic Injection-Locked
Quadrature Oscillator with Short-Circuit
Source Coupling Connection
Fiscal Year 2009
Satoshi Ao
Reduction in Total Capacitances of Low-Pass Balanced-Type
Switched Capacitor Filters using Capacitor Devision Technique (in Japanese)
Youichirou Ooi
Derivation of Low Noise Amplifiers using No Inductor
from Performance Parameters (in Japanese)
Fiscal Year 2008
Kota Uehara
Common-Mode Noise Reduction Circuits for SoCs (in Japanese)
Katsuyuki Takagi
Delta-Sigma Modulator Design considering Capacitance Deviations in Manufacturing Process (in Japanese)
Zhang Jie Ting
Variable-Gain Current Amplifiers for Taking External Large Signals
into Low-Supply Voltage Integrated Circuits (in Japanese)
Fiscal Year 2007
Yuji Sato
Common-Mode Noise Reduction Circuit for On-Chip Analog Interface (in Japanese)
Atsumi Niwa
Monithic Realization of Filters for Extremely Low-Frequency Signal Processing (in Japanese)
Fiscal Year 2006
Shinpei Sakoda
Linear-in-dB Variable-Gain Amplifier with Wide Gain Tuning Range (in Japanese)
Yuya Morimura
High-Performance Substrate Noise Reduction Circuit (in Japanese)
Daisuke Kobayashi
Jitter Tolerance Improvement for Continuous-Time Over Sampling A-D Converters (in Japanese)
Yosuke Sakai
Distortion Cancellation with Multi-Path Structure (in Japanese)
Fiscal Year 2004
Kazuya Yoshizaki
Reducation in Phase Errors of Quadrature Ring Oscillators (in Japanese)
Sirichai Bannasarn
High-Frequency High-Q Current-Mode Fitlers using Current Mirrors
Fiscal Year 2003
Mutsuhiko Takeda
Low-Voltage and High-Speed Ring Oscillator (in Japanese)
Shogo Matsubara
Synthesis of Mixers suitable for Image Rejection (in Japanese)
Fiscal Year 2002
Fumito Kusama
High-Speed Locking PLL-based Frequency Synthesizer using Coarse Tuning (in Japanese)
Fiscal Year 2001
Masashi Nakao
Low Noise Ampifiers for Band-Pass Sampling (in Japanese)
Nicodimus Retdian Agung Wahyu Wijaya
Fully On-chip Active Guard Band Circuit for Digital Noise Suppression
Fiscal Year 2000
Naoaki Nishimura
Low Power-Consumption and High Slew-Rate Operational Amplifier Using a Capacitance Mutiplier (in Japanese)
Atsushi Matamura
High Compression-Ratio and Class AB Realizations of MOSFET Companding Integrators (in Japanese)
Fiscal Year 1999
Takahide Sato
Voltage Regulating Circuits Using MOSFET's in the Nonsaturation Region for OTA's (in Japanese)
Mamoru Nakamura
OTA's Reducing in Harmonic Distortions due to Second-Order Effects of MOSFET
in the Nonsaturation Region (in Japanese)
Akira Yamada
Study on Low-Power Switched-Current Circuits (in Japanese)
Fiscal Year 1998
Yoshiaki Honda
Low-Noise Transimpedance Amplifier Design (in Japanese)
Koji Matsuura
Adaptive Low-Pass Filter for Spectral Estimation (in Japanese)
Fiscal Year 1997
Yoshifumi Ogata
Efficiency Improvement on Automatic Detection of Parallelism
by Petrinet Representation of Programs (in Japanese)
Hajime Yamato
Study on Simulation-Time Reduction in System-Level Simulator (in Japanese)
Fiscal Year 1996
Tomonori Ura
Study on Mixed Analog-and-Digital System Level Simulator (in Japanese)
Kentaro Sasaki
Study on Variable-Gain Amplifier Using CMOS Process (in Japanese)
MoonJae Jeong
A Study on Design of Electrically Tunable Multi-Input CMOS OTAs
and their Applications
Fiscal Year 1995
Takashi Umemoto
Synthesis of Variable Capacitance Multipliers Using GIC's (in Japanese)
Michiteru Shichiro
Synthesis of DDA's and their Applications to Floating Elements (in Japanese)
Naoki Sugitani
Image Signal Processing based on Flat-Part Detection (in Japanese)
Fiscal Year 1994
Yukio Okamura
Synthesis of Stable High-Order 1-Bit Delta-Sigma Modulators (in Japanese)
Shin Kurogi
Synthesis of Flat-Group Delay High-Frequency Filters with Tunable Cutoff Frequency
and Amplitude Characteristics (in Japanese)
Yushuke Fujikawa
Circuit Parameter Design based on Boundary Search (in Japanese)
Fiscal Year 1993
Hirochika Matsuoka
Study on Synthesis of Stable Over-Sampling High-Order Sigma-Delta Modulators
(in Japanese)
Hisamiti Hasegawa
Synthesi of Variable Resistive Networks Using Bipolar Process and their Applications
(in Japanese)
Takuya Shin
Synthesis of Switched-Current Delay Circuit with Reduced Clock-Feedthrough Effect
and its Application to Filters (in Japanese)
Fiscal Year 1992
Takayuki Iyama
Study on Automatic Tuning Circuit for Continuous-Time Filters (in Japanese)
Suehiro Shimauchi
Study on Sound Signals Using Wavelet Transformation (in Japanese)
Shinichi Nakamura
Study on Realization and Application of Low-Distortion Transconductance
under Low Supply Voltages (in Japanese)
Fiscal Year 1991
Yoshinori Abe
LC Simulation-Type SC Filters Using Unity-Gain Buffers (in Japanese)
Kenji Tabei
Linear Resisotr Realization using NIC's and MOSFET's and its Application to Filters
(in Japanese)